Electronic circuits are widely used in communication and sensing devices. In particular, power transistors are found in many electronic devices. Such power transistors are larger than those typically found in logic circuits, have different frequency requirements, and are typically used in analog circuits. Furthermore, it is often desirable to use different materials for the power transistors than for logic circuits. In particular, logic circuits often use CMOS circuits constructed in silicon semiconductor materials. In contrast, other compound semiconductor materials, for example, gallium arsenide (GaAs) have a higher electron mobility than silicon and can therefore have higher performance for power applications.
In many electronic circuits, it is useful to integrate both logic and power transistors in a common package. If common materials are employed either the logic circuits are limited or the power transistors have lower performance. If different materials are used, conventional integration methods can be inconvenient or problematic. For example, forming a crystalline compound semiconductor layer (e.g., GaAs) on a silicon semiconductor substrate can be difficult. Alternatively, forming a compound semiconductor layer separate from a silicon substrate and then affixing the compound semiconductor layer to the silicon substrate requires a number of process steps. For example, a compound semiconductor layer can be formed on a native substrate and a handle substrate affixed to the side of the compound semiconductor layer opposite the native substrate. The native substrate is then removed, for example by grinding, and then the layer adhered to a semiconductor substrate. The handle substrate is then removed. The silicon and compound semiconductor layers can then be processed in common. Japanese Patent Publication No. JP2009-081478 describes such a process. However, the processes of grinding and handle substrate removal can be problematic or time consuming. Furthermore, there can be process steps that are best performed on each material separately.
Power transistors typically generate considerable amounts of heat and the management of that heat is often a challenge in systems using power transistors. Moreover, as the devices grow hotter, their performance can degrade.
There is a need, therefore, for improved structures and methods for integration of logic circuits and power transistors having different materials and for reducing or managing the heat generated by power transistors.